Boron impurity at the Si/SiO2 interface in SOI wafers and consequences for piezoresistive MEMS devices
Artikel i vetenskaplig tidskrift, 2009

In this work, the electrical performance of piezoresistive devices fabricated on thinned SOI wafers has been investigated. Specifically, SOI wafers manufactured with the standard bond-and-etch back method (BESOI), commonly used for MEMS fabrication, have been studied. Results from electrical measurements and SIMS characterization show the presence of a boron impurity close to the buried oxide, even on unprocessed wafers. If the boron impurity overlaps with the piezoresistors on the device, it can create non-defined pn-junctions and thus allow conduction through the substrate, leading to stray connections and excessive noise. The thickness of the boron impurity can extend up to several μm, thus setting a thickness limit for the thinnest parts of a MEMS device. This work shows how this impurity can fundamentally affect the functionality of piezoresistive devices. Design rules of how to avoid this are presented

Boron impurity

Piezoresistive

MEMS

SOI

Författare

Alexandra Nafari

Chalmers, Teknisk fysik, Elektronikmaterial och system

Cristina Rusu

Imego AB - The Institute of Micro and Nanotechnology

Krister Svensson

Karlstads universitet

Peter Enoksson

Chalmers, Teknisk fysik, Elektronikmaterial och system

Journal of Micromechanics and Microengineering

0960-1317 (ISSN)

Vol. 19 1 6-

Styrkeområden

Nanovetenskap och nanoteknik

Materialvetenskap

Infrastruktur

Nanotekniklaboratoriet

Ämneskategorier

Annan elektroteknik och elektronik

DOI

10.1088/0960-1317/19/1/015034

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2018-05-23