LDMOS Modeling

Artikel i vetenskaplig tidskrift, 2013

This article describes the detailed efforts of the winning contribution of the first student competition in microwave transistor modeling, held at the 2012 International Microwave Symposium (IMS2012) in Montreal, Quebec, Canada. The competition was sponsored by MTT-1, Freescale Semiconductor Inc., and WIN Semiconductor Inc. The transistor modeled was a commercially available high-power device from Freescale, and the characterization data required for modeling was distributed to all competitors. No measurements were to be carried out by the participants, so all students world wide, even those without expensive transistor characterization equipment, could participate. The main objectives of the competition were to identify the technology and develop a nonlinear model from the provided measurement data set [e.g., cold field effect transistor (FET) measurements, pulsed IV, IV versus temperature, S parameter versus bias, and pulsed S-parameter measurements] . The developed model was also to be validated versus large signal one-and two-tone measurements. The validation data was in the form of output power and power added efficiency (PAE) versus input power and measured at two different conditions, e.g., input/output terminations for maximum efficiency and maximum output power, respectively. An accurate model should be able to predict the large signal measurements across the full range of input power levels and bias points available. The judgment of the modeling result was based on the agreement between model simulation and measurement in terms of output power, efficiency, and third-order intermodulation (IM3) versus input power, several of which were not provided to the competitors. © 2000-2012 IEEE.