Design Considerations and Evaluation of a High-Speed SAR ADC
Paper i proceeding, 2018
We present design and evaluation of an asynchronous, alternating-comparator, 800MS/s SAR ADC. The comparators use continuous calibration to compensate for static input offset voltages. We use a combination of measurements and behavioural modelling to identify two possible causes of limited performance; leakage from the output drives onto the input signal, and dynamic offset voltage in the comparators.
SAR
ADC
Författare
Victor Åberg
Chalmers, Data- och informationsteknik, Datorteknik
Christian Fager
Chalmers, Mikroteknologi och nanovetenskap, Mikrovågselektronik
Lars Svensson
Chalmers, Data- och informationsteknik, Datorteknik
2018 IEEE Nordic Circuits and Systems Conference, NORCAS 2018: NORCHIP and International Symposium of System-on-Chip, SoC 2018 - Proceedings
8573500
978-1-5386-7656-1 (ISBN)
2018 IEEE Nordic Circuits and Systems Conference (NorCAS)
Tallinn, Estonia,
Tallinn, Estonia,
Styrkeområden
Informations- och kommunikationsteknik
Ämneskategorier (SSIF 2011)
Signalbehandling
Annan elektroteknik och elektronik
DOI
10.1109/NORCHIP.2018.8573500