Techniques to Improve Energy Efficiency on Heterogeneous Multiprocessors under Timing and Quality Constraints
This thesis presents techniques to reduce energy consumption under QoS constraints by allocating resources at run-time on heterogeneous multiprocessor platforms targeting sequential and parallel iterative and task-parallel applications. The proposed techniques rely on a progress-tracking framework that monitors and predicts how much time is left until the application finishes. Furthermore, the proposed framework enables the prediction of computation demand and performance requirements for future iterations or tasks. The first contribution of this thesis is a resource management technique, called SLOOP, targeting single-threaded applications. SLOOP allocates resources, i.e., processor type and DVFS, for each iteration to meet deadlines while using the prediction of computational demand and execution time.
The second contribution of this thesis is a resource-management scheme, called SaC, for multi-threaded applications executing on HMPs, where resources also include the number of processors besides DVFS and processor type. SaC first chooses the most energy-efficient configuration that meets the deadline. The proposed technique collects execution-time slack over subsequent iterations to select a configuration that can save energy.
The third contribution of this thesis is a resource manager, called Task-RM, for task-parallel applications executing on HMPs under QoS constraints. Task-RM exploits the variance in task execution times and imbalance between sibling tasks to allocate just enough resources in terms of DVFS and processor type. It uses an innovative off-line analysis to avoid redoing scheduling analysis at run-time.
Finally, the fourth contribution is a scheme, called Approx-RM, that can exploit accuracy-energy trade-offs in approximate iterative applications. Approx-RM allocates an appropriate amount of resources while guaranteeing timing and solution quality specifications. Approx-RM first predicts the iteration count required to meet the quality target and then allocates enough resources on an HMP in terms of DVFS, processor type, and processor count to save energy while meeting a performance target.
Dynamic Voltage Frequency Scaling (DVFS)
Quality of Service
Soft real time systems.
Muhammad Waqar Azhar
Chalmers, Data- och informationsteknik, Datorteknik, Computer Systems
Task-RM: A Resource Manager for Energy Reduction in Task-Parallel Applications under Quality of Service Constraints
Transactions on Architecture and Code Optimization,; Vol. 19(2022)
Artikel i vetenskaplig tidskrift
SaC: Exploiting execution-time slack to save energy in heterogeneous multicore systems
ACM International Conference Proceeding Series,; (2019)
Paper i proceeding
SLOOP: QoS-Supervised Loop Execution to Reduce Energy on Heterogeneous Architectures
ACM Transactions on Architecture and Code Optimization,; Vol. 14(2017)p. Article No. 41-
Artikel i vetenskaplig tidskrift
This thesis first identifies applications where one could limit the performance without lowering the value to the user by specifying the performance target as the quality of service (QoS) requirements. The thesis then develops resource management frameworks that allow computers to comply with the performance targets by just allocating enough resources and, that way saving energy. These frameworks make use of progress tracking to predict how long time is available until the end of the application and what resources are needed to meet that target. The thesis quantitatively establishes that considerable energy can be saved that can be either used to elongate the battery life in the case of mobile/ embedded devices or can result in reduced energy bills for cloud/servers.
PRIME: Konstruktionsprinciper för minnesberäknande parallella system
Vetenskapsrådet (VR) (2019-04929), 2019-12-01 -- 2023-11-30.
Meeting Challenges in Computer Architecture (MECCA)
Europeiska kommissionen (EU) (EC/FP7/340328), 2014-02-01 -- 2019-01-31.
Principer för beräknande minnesenheter (PRIDE)
Stiftelsen för Strategisk forskning (SSF) (DnrCHI19-0048), 2021-01-01 -- 2025-12-31.
Data- och informationsvetenskap
Elektroteknik och elektronik
Doktorsavhandlingar vid Chalmers tekniska högskola. Ny serie: 5087
Room 8103, EDIT Building, Rännvägen 6, Chalmers University of Technology
Opponent: Prof. Josep Torrellas, University of Illinois, Urbana-Champaign, USA