Muhammad Waqar Azhar

Forskare vid Datorteknik

I am a computer system architect with a passion for designing innovative products. Having experience in electrical and computer engineering allows me to have a holistic view of product implementation ideas and develop optimal solutions for electronic system design problems. I have competence in both hardware and software and also in co-design. Most importantly, I have an appetite always for learning new things. I have extensive experience designing embedded systems employing a variety of platforms, e.x., MCU, FPGA, and SBC. In addition, I have worked with application domains such as industrial communication, security, IoT, real-time control, and power electronics control.

Källa: orcid.org
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Visar 20 publikationer

2024

An Efficient Hybrid Deep Learning Accelerator for Compact and Heterogeneous CNNs

Fareed Mohammad Qararyah, Muhammad Waqar Azhar, Pedro Petersen Moura Trancoso
Transactions on Architecture and Code Optimization. Vol. 21 (2)
Artikel i vetenskaplig tidskrift
2024

Scratchpad Memory Management for Deep Learning Accelerators

Stavroula Zouzoula, Mohammad Ali Maleki, Muhammad Waqar Azhar et al
ACM International Conference Proceeding Series, p. 629-639
Paper i proceeding
2024

DNNOPT: A Framework for Efficiently Selecting On-chip Memory Loop Optimizations of DNN Accelerators

Piyumal Ranawaka, Muhammad Waqar Azhar, Per Stenström
Proceedings of the 21st ACM International Conference on Computing Frontiers, CF 2024, p. 126-137
Paper i proceeding
2024

Fusing Depthwise and Pointwise Convolutions for Efficient Inference on GPUs

Fareed Mohammad Qararyah, Muhammad Waqar Azhar, Mohammad Ali Maleki et al
ACM International Conference Proceeding Series, p. 58-67
Paper i proceeding
2023

VEDLIoT: Next generation accelerated AIoT systems and applications

Kevin Mika, René Griessl, Nils Kucza et al
Proceedings of the 20th ACM International Conference on Computing Frontiers 2023, CF 2023, p. 291-296
Paper i proceeding
2023

Approx-RM: Reducing Energy on Heterogeneous Multicore processors under Accuracy and Timing Constraints

Muhammad Waqar Azhar, Madhavan Manivannan, Per Stenström
Transactions on Architecture and Code Optimization. Vol. 20 (3)
Artikel i vetenskaplig tidskrift
2023

Evaluation of heterogeneous AIoT Accelerators within VEDLIoT

R. Griessl, F. Porrmann, Nils Kucza et al
Proceedings -Design, Automation and Test in Europe, DATE. Vol. 2023-April
Paper i proceeding
2023

A Scalable, Heterogeneous Hardware Platform for Accelerated AIoT based on Microservers

René Griessl, Florian Porrmann, Nils Kucza et al
Shaping the Future of IoT with Edge Intelligence How Edge Computing Enables the Next Generation of IoT Applications, p. 179-196
Kapitel i bok
2023

RAINBOW: Multi-Dimensional Hardware-Software Co-Design for DL Accelerator On-Chip Memory

Stavroula Zouzoula, Muhammad Waqar Azhar, Pedro Petersen Moura Trancoso
Proceedings - 2023 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2023, p. 352-354
Paper i proceeding
2023

ARADA: Adaptive Resource Allocation for Improving Energy Efficiency in Deep Learning Accelerators

Muhammad Waqar Azhar, Stavroula Zouzoula, Pedro Petersen Moura Trancoso
Proceedings of the 20th ACM International Conference on Computing Frontiers 2023, CF 2023, p. 63-72
Paper i proceeding
2023

Exploiting the Potential of Flexible Processing Units

Mateo Vázquez Maceiras, Muhammad Waqar Azhar, Pedro Petersen Moura Trancoso
Proceedings - Symposium on Computer Architecture and High Performance Computing, p. 34-45
Paper i proceeding
2022

Task-RM: A Resource Manager for Energy Reduction in Task-Parallel Applications under Quality of Service Constraints

Muhammad Waqar Azhar, Miquel Pericas, Per Stenström
Transactions on Architecture and Code Optimization. Vol. 19 (1)
Artikel i vetenskaplig tidskrift
2022

FiBHA: Fixed Budget Hybrid CNN Accelerator

Fareed Mohammad Qararyah, Muhammad Waqar Azhar, Pedro Petersen Moura Trancoso
Proceedings - Symposium on Computer Architecture and High Performance Computing, p. 180-190
Paper i proceeding
2022

VSA: A Hybrid Vector-Systolic Architecture

Mateo Vázquez Maceiras, Muhammad Waqar Azhar, Pedro Petersen Moura Trancoso
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. Vol. 2022-October, p. 368-376
Paper i proceeding
2019

SaC: Exploiting execution-time slack to save energy in heterogeneous multicore systems

Muhammad Waqar Azhar, Miquel Pericas, Per Stenström
ACM International Conference Proceeding Series
Paper i proceeding
2017

SLOOP: QoS-Supervised Loop Execution to Reduce Energy on Heterogeneous Architectures

Muhammad Waqar Azhar, Per Stenström, Vasileios Papaefstathiou
Transactions on Architecture and Code Optimization. Vol. 14 (4), p. Article No. 41-
Artikel i vetenskaplig tidskrift
2012

Viterbi Accelerator for Embedded Processor Datapaths

Muhammad Waqar Azhar, Magnus Själander, Ali Hasan et al
Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, p. 133-140
Paper i proceeding
2010

Cyclic Redundancy Checking (CRC) Accelerator for the FlexCore Processor

Muhammad Waqar Azhar, Tung Hoang, Per Larsson-Edefors
Proceedings of Euromicro Conference on Digital System Design (DSD), p. 675-680
Paper i proceeding

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