Muhammad Waqar Azhar
I am a computer system architect with a passion for designing innovative products. Having experience in electrical and computer engineering allows me to have a holistic view of product implementation ideas and develop optimal solutions for electronic system design problems. I have competence in both hardware and software and also in co-design. Most importantly, I have an appetite always for learning new things. I have extensive experience designing embedded systems employing a variety of platforms, e.x., MCU, FPGA, and SBC. In addition, I have worked with application domains such as industrial communication, security, IoT, real-time control, and power electronics control.
Showing 20 publications
An Efficient Hybrid Deep Learning Accelerator for Compact and Heterogeneous CNNs
Scratchpad Memory Management for Deep Learning Accelerators
DNNOPT: A Framework for Efficiently Selecting On-chip Memory Loop Optimizations of DNN Accelerators
Fusing Depthwise and Pointwise Convolutions for Efficient Inference on GPUs
VEDLIoT: Next generation accelerated AIoT systems and applications
Evaluation of heterogeneous AIoT Accelerators within VEDLIoT
A Scalable, Heterogeneous Hardware Platform for Accelerated AIoT based on Microservers
RAINBOW: Multi-Dimensional Hardware-Software Co-Design for DL Accelerator On-Chip Memory
ARADA: Adaptive Resource Allocation for Improving Energy Efficiency in Deep Learning Accelerators
Exploiting the Potential of Flexible Processing Units
FiBHA: Fixed Budget Hybrid CNN Accelerator
VSA: A Hybrid Vector-Systolic Architecture
Techniques to Save Energy in Heterogeneous Multicore Architectures under QoS Constraints
SaC: Exploiting execution-time slack to save energy in heterogeneous multicore systems
SLOOP: QoS-Supervised Loop Execution to Reduce Energy on Heterogeneous Architectures
Viterbi Accelerator for Embedded Processor Datapaths
Cyclic Redundancy Checking (CRC) Accelerator for the FlexCore Processor
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