EPI SGA2
Forskningsprojekt, 2022 – 2024

Digital sovereignty has become a key requirement for the EU, which is now striving to move from a simple user of ICT technologies to a main player on the digital market, both for products and human skills. Also, the need for EU (and the EuroHPC JU) to deploy Europe world-class exascale supercomputers is urging. The European Processor Initiative develops a roadmap for future European high-performance low power processors aligned with the EuroHPC roadmap.

EPI focuses on processor technologies based on ARM ISA and architecture for covering the short term needs and HPC accelerator technologies based on RISC-V, the open-source ISA. RISC-V is also candidate to become the Europea's own technologies for covering long term objectives. SGA2 also seeks to expand the scope of the project into adjacent European and global vertical markets that can leverage HPC to enable new and improved systems and solutions.

The present EPI SGA2 proposal, built on top of EPI SGA1 represents the second step toward the implementation of this roadmap. This second step will have a three-year duration with the following objectives:

Finalize the development and the bring-up of the first generation of low-power processor units developed in SGA1,
Develop the second generation of the General Purpose Processor (GPP) applying technological enhancements targeting the European Exascale machines with respect to the GPP (Rhea) of SGA1,
Develop the second generation of low-power accelerator test chips, usable by the HPC community for tests and finally
Develop sound and realistic industrialisation & commercialisation paths and Enable long-term economical sustainability with an industrialization path in the edge computing area, demonstrated in a few well-chosen proofs of concepts like autonomous shuttles or video surveillance.

Deltagare

Per Stenström (kontakt)

Chalmers, Data- och informationsteknik, Dator- och nätverkssystem

Miquel Pericas

Chalmers, Data- och informationsteknik, Datorteknik

Pedro Petersen Moura Trancoso

Chalmers, Data- och informationsteknik, Datorteknik

Ioannis Sourdis

Chalmers, Data- och informationsteknik, Datorteknik

Samarbetspartners

BMW

Muenchen, Germany

Barcelona Supercomputing Center (BSC)

Barcelona, Spain

CINECA CONSORZIO INTERUNIVERSITARIO (CINECA)

Casalecchio di Reno, Italy

Compagnie Des Machines Bull S.A.

Paris, France

E4 Computer Engineering SpA

Scandiano, Italy

Eidgenössische Technische Hochschule Zürich (ETH)

Zürich, Switzerland

Elektrobit Automotive

Erlangen, Germany

Extoll GmbH

Mannheim, Germany

Forschungszentrum Jülich

Juelich, Germany

Fraunhofer-Gesellschaft

Munchen, Germany

Genci grand équipement national de calcul intensif (GENCI)

Paris, France

Idryma Technologias kai Erevnas (FORTH)

Heraklion, Greece

Infineon Technologies

Neubiberg, Germany

Kalray

Montbonnot, France

Karlsruher Institut für Technologie (KIT)

Karlsruhe, Germany

Kernkonzept

Dresden, Germany

Le Commissariat à l’Énergie Atomique et aux Énergies Alternatives (CEA)

Gif-sur-Yvette, France

Leonardo - Societa per azioni

Roma, Italy

Menta SAS

Valbonne, France

PROVEnRUN

Paris, France

STMicroelectronics Agrate

Agrate Brianza, Italy

SemiDynamics

Barcelona, Spain

SiPearl

Maisons-Laffitte, Metropolitan France

Surfsara Bv

Utrecht, Netherlands

Sveučilište u Zagrebu Fakultet elektrotehnike i računarstva

Zagreb, Croatia

Universidade de Lisboa

Lisboa, Portugal

Universita di Bologna

Bologna, Italy

Universita di Pisa

Pisa, Italy

ZeroPoint Technologies

Göteborg, Sweden

Finansiering

Europeiska kommissionen (EU)

Projekt-id: 101036168
Finansierar Chalmers deltagande under 2022–2024

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Senast uppdaterat

2022-06-08