Once More, With Combinators: Designing a Low-Power Architecture for Functional Programming
Doktorsavhandling, 2024
The Internet of Things (IoT) consists of a growing number of networked appliances, from coffee machines to door locks. Each of them contains one—or more—microprocessors responsible for their operation and communication. While some appliances may have an abundance of resources, others need to operate under significant energy and size constraints, encouraging the use of low-power microcontrollers.
Unfortunately, many of these microcontrollers are programmed in low-level languages due to their constraints, resulting in security vulnerabilities. These are worsened by the physical presence that IoT devices have: as appliances, they can usually interact with the environment through sensors and actuators, making vulnerabilities particularly concerning from privacy and safety perspectives. Lazy, pure functional programming languages are promising both in ease of development and correctness, but have historically been difficult to run without considerable resources.
This thesis aims to bring these languages to IoT devices through the creation of a low-power processor architecture, Cephalopode, that carries out graph reduction in hardware. Synthesis and simulation of Cephalopode indicates that it significantly outperforms a combinator-based software implementation on a RISC-V core, and suggests that it would match (and sometimes exceed) the performance of GHC if the latter were able to emit code for RISC-V. It is in turn outperformed by native C code with fixed-width integers, but nears the performance of C with an arbitrary-precision library. While designing Cephalopode several difficulties with hardware description languages were identified, leading to the development of Stately, an editor for a simple but powerful extension of finite state machines, and Bifröst, a high-level language for modular hardware design. The latter provides a novel approach to input-output that has proven to be both at a comfortable level of abstraction and suitable for use in realistic hardware designs.
Unfortunately, many of these microcontrollers are programmed in low-level languages due to their constraints, resulting in security vulnerabilities. These are worsened by the physical presence that IoT devices have: as appliances, they can usually interact with the environment through sensors and actuators, making vulnerabilities particularly concerning from privacy and safety perspectives. Lazy, pure functional programming languages are promising both in ease of development and correctness, but have historically been difficult to run without considerable resources.
This thesis aims to bring these languages to IoT devices through the creation of a low-power processor architecture, Cephalopode, that carries out graph reduction in hardware. Synthesis and simulation of Cephalopode indicates that it significantly outperforms a combinator-based software implementation on a RISC-V core, and suggests that it would match (and sometimes exceed) the performance of GHC if the latter were able to emit code for RISC-V. It is in turn outperformed by native C code with fixed-width integers, but nears the performance of C with an arbitrary-precision library. While designing Cephalopode several difficulties with hardware description languages were identified, leading to the development of Stately, an editor for a simple but powerful extension of finite state machines, and Bifröst, a high-level language for modular hardware design. The latter provides a novel approach to input-output that has proven to be both at a comfortable level of abstraction and suitable for use in realistic hardware designs.
Hardware Description Languages
Functional Programming
High-Level Synthesis
Architectures
internet of things
Analysen, EDIT-Huset, Rännvägen 6B
Opponent: Arvind, Massachusetts Institute of Technology, United States of America
Författare
Jeremy Pope
Chalmers, Data- och informationsteknik, Funktionell programmering
Pope, J, Seger, C-J H., Valter, H. Higher-order Hardware: Implementation and Evaluation of the Cephalopode Graph Reduction Processor
As the Internet of Things (IoT) continues to grow, more and more small networked devices make their way into households and workplaces around the world. In the interest of saving energy, these devices often use limited, low-power microprocessors, which are in turn programmed in efficient but unsafe languages. Safer and more convenient programming languages—typically "high-level languages"—often require too many resources on traditional microprocessors to be used in such a setting.
This thesis investigates the possibility of creating a custom low-power microprocessor designed to directly run a particular type of high-level language—lazy, pure, functional languages—in order to allow IoT devices to be programmed in a safer and more desireable way. The result is a processor architecture named Cephalopode, which is compared through performance and energy simulations to a traditional microprocessor running similar programs.
Designing efficient and correct hardware is difficult due to the tension between the parallel nature of hardware and the sequential way we imagine many computations. Developing Cephalopode inspired two tools to help address this challenge: Stately, an editor for creating clear but efficient finite state machines; and Bifröst, a high-level language for describing hardware that carries out complex, algorithmic tasks.
This thesis investigates the possibility of creating a custom low-power microprocessor designed to directly run a particular type of high-level language—lazy, pure, functional languages—in order to allow IoT devices to be programmed in a safer and more desireable way. The result is a processor architecture named Cephalopode, which is compared through performance and energy simulations to a traditional microprocessor running similar programs.
Designing efficient and correct hardware is difficult due to the tension between the parallel nature of hardware and the sequential way we imagine many computations. Developing Cephalopode inspired two tools to help address this challenge: Stately, an editor for creating clear but efficient finite state machines; and Bifröst, a high-level language for describing hardware that carries out complex, algorithmic tasks.
Octopi: Säker Programmering för Sakernas Internet
Stiftelsen för Strategisk forskning (SSF), 2018-05-01 -- .
Styrkeområden
Informations- och kommunikationsteknik
Ämneskategorier
Datavetenskap (datalogi)
ISBN
978-91-8103-062-4
Doktorsavhandlingar vid Chalmers tekniska högskola. Ny serie: 5520
Utgivare
Chalmers
Analysen, EDIT-Huset, Rännvägen 6B
Opponent: Arvind, Massachusetts Institute of Technology, United States of America