Word length dependent sensitivity penalty in high speed VCSEL based optical interconnects
Artikel i vetenskaplig tidskrift, 2024
The use of long pseudo-random bit sequences to emulate random data in optical transmission links often gives rise to degradation of the receiver sensitivity for a given target bit error rate resulting in a power budget penalty. This is a well know fact and conventionally attributed to the non-ideal response of the system at very low frequencies. Here, we investigate this in the context of directly-modulated vertical-cavity surface emitting laser (VCSEL) based optical interconnects. We observe, both in simulations and in experiments, a substantial increase in the penalty with long sequences especially at symbol rates exceeding the VCSEL bandwidth. Our results show that this is related to the high frequency dynamic behavior of the VCSEL itself and we identify a few certain short bit sequences that cause the large penalty observed. We also show that the penalty can be significantly reduced by a simple modification of the sequences
Standards
Pseudo-random bit sequence (PRBS)
Fiber-optical communication
Vertical-cavity surface emitting lasers
High speed data transmission
850 nm
Mathematical models
Integrated circuit modeling
Optical interconnects
Bit rate
Floors
Vertical cavity surface emitting lasers
IM/DD
Optical interconnections
Författare
Muhammad Bilal Aziz
Chalmers, Mikroteknologi och nanovetenskap, Fotonik
Stavros Giannakopoulos
Embedded Electronics Systems and Computer Graphics
Alexander Grabowski
Chalmers, Mikroteknologi och nanovetenskap, Fotonik
Peter Andrekson
Chalmers, Mikroteknologi och nanovetenskap, Fotonik
IEEE Photonics Technology Letters
1041-1135 (ISSN) 19410174 (eISSN)
Vol. In PressOptiska länkar för krävande datormiljöer
Stiftelsen för Strategisk forskning (SSF) (CHI19-0004), 2021-01-01 -- 2025-12-31.
Styrkeområden
Informations- och kommunikationsteknik
Nanovetenskap och nanoteknik
Ämneskategorier
Telekommunikation
Kommunikationssystem
Nanoteknik
Signalbehandling
Annan elektroteknik och elektronik
Infrastruktur
Nanotekniklaboratoriet
DOI
10.1109/LPT.2024.3451141