KASYAB PARMESH SUBRAMANIYAN
Showing 14 publications
On DFM Considerations and Assessment for Nanometer SoCs
MIDAS: Model for IP-inclusive DFM assessment of system manufacturability
Manufacturable Nanometer Designs using Standard Cells with Regular Layout
On Regularity and Integrated DFM Metrics
FlexDEF: Development Framework for Processor Architecture Implementation and Evaluation
Application-Specific Energy Optimization of General-Purpose Datapath Interconnect
Design Space Exploration for an Embedded Processor with Flexible Datapath Interconnect
Impact of Standard Cell Pin Placement on Routing Regularity of HPM Architectures
Datapath Interconnect Optimization Engine for Energy-Efficient FlexCore Configurations
Generation and Exploration of Layouts for Area-Efficient Barrel Shifters
FlexTools: Design Space Exploration Tool Chain from C to Physical Implementation
Fast Layout Exploration Using the Wired System
Custom Layout Strategy for Rectangle-Shaped Log-Depth Multiplier Reduction Tree
Layout Exploration of Geometrically Accurate Arithmetic Circuits
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