KASYAB PARMESH SUBRAMANIYAN
Visar 14 publikationer
On DFM Considerations and Assessment for Nanometer SoCs
MIDAS: Model for IP-inclusive DFM assessment of system manufacturability
Manufacturable Nanometer Designs using Standard Cells with Regular Layout
On Regularity and Integrated DFM Metrics
Application-Specific Energy Optimization of General-Purpose Datapath Interconnect
FlexDEF: Development Framework for Processor Architecture Implementation and Evaluation
Datapath Interconnect Optimization Engine for Energy-Efficient FlexCore Configurations
Design Space Exploration for an Embedded Processor with Flexible Datapath Interconnect
FlexTools: Design Space Exploration Tool Chain from C to Physical Implementation
Impact of Standard Cell Pin Placement on Routing Regularity of HPM Architectures
Generation and Exploration of Layouts for Area-Efficient Barrel Shifters
Fast Layout Exploration Using the Wired System
Layout Exploration of Geometrically Accurate Arithmetic Circuits
Custom Layout Strategy for Rectangle-Shaped Log-Depth Multiplier Reduction Tree
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