Alen Bardizbanyan

Publikationer (18)
Projekt (0)

Visar 18 publikationer

2017

CREEP: Chalmers RTL-based Energy Evaluation of Pipelines

Daniel Moreau, Alen Bardizbanyan, Magnus Själander et al

Rapport

2017

Data filter cache designs for enhancing energy efficiency and performance in computing systems

David Whalley, Magnus Själander, Alen Bardizbanyan et al

Patent

2017

Systems and methods for improving processor efficiency through caching

David Whalley, Magnus Själander, Alen Bardizbanyan et al

Patent

2016

Practical Way Halting by Speculatively Accessing Halt Tags

Daniel Moreau, Alen Bardizbanyan, Magnus Själander et al

19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016, Dresden, Germany, 14-18 March 2016, p. 1375-1380

Paper i proceeding

2016

Logic Filter Cache for Wide-VDD-Range Processors

Alen Bardizbanyan, Oskar Andersson, Joachim Rodrigues et al

Proceedings of 23rd IEEE Int. Conf. on Electronics, Circuits and Systems, p. 376-379

Paper i proceeding

2015

Exploring early and late ALUs for single-issue in-order pipelines

Alen Bardizbanyan, Per Larsson-Edefors

Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015. New York City, United States, 18-21 October 2015, p. 543-548

Paper i proceeding

2015

Data Access Techniques for Enhanced Energy Efficiency and Performance in In-order Pipelines

Alen Bardizbanyan

Doktorsavhandling

2015

Improving Data Access Efficiency by Using Context-Aware Loads and Stores

Alen Bardizbanyan, Magnus Själander, David Whalley et al

SIGPLAN Notices (ACM Special Interest Group on Programming Languages). Vol. 50 (5), p. 27-36

Paper i proceeding

2014

Reducing set-associative L1 data cache energy by early load data dependence detection (ELD3)

Alen Bardizbanyan, M. Själander, D.B. Whalley et al

Proceedings -Design, Automation and Test in Europe, DATE

Paper i proceeding

2014

Evaluating Branch Predictor Configurations for a MIPS-like Pipeline

Fredrik Brosser, Karthik Manchanahalli Rajendra Prasad, Alen Bardizbanyan et al

Swedish System-on-Chip Conference

Övrigt konferensbidrag

2013

Improving Data Access Efficiency by Using a Tagless Access Buffer (TAB)

Alen Bardizbanyan, Peter Gavin, David Whalley et al

Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2013, p. 269-279

Paper i proceeding

2013

Towards a Performance- and Energy-Efficient Data Filter Cache

Alen Bardizbanyan, Magnus Själander, David Whalley et al

Workshop on Optimizations for DSP and Embedded Systems (ODES), Proceedings of International Symposium on Code Generation and Optimization (CGO), Shenzhen, China, Feb. 23-27,, p. 21-28

Paper i proceeding

2013

Designing a Practical Data Filter Cache to Improve Both Energy Efficiency and Performance

Alen Bardizbanyan, Magnus Själander, David Whalley et al

Transactions on Architecture and Code Optimization. Vol. 10 (4), p. 25 pages-

Artikel i vetenskaplig tidskrift

2013

Speculative Tag Access for Reduced Energy Dissipation in Set-Associative L1 Data Caches

Alen Bardizbanyan, Magnus Själander, David Whalley et al

Proceedings of IEEE International Conference on Computer Design (ICCD), Asheville, NC, USA, October 6-9 2013, p. 302-308

Paper i proceeding

2013

Techniques to Reduce Energy Dissipation in Level-1 Data Caches

Alen Bardizbanyan

Licentiatavhandling

2012

Configurable RTL Model for Level-1 Caches

Vahid Saljooghi, Alen Bardizbanyan, Magnus Själander et al

Proceedings of NORCHIP, Copenhagen, Denmark, Nov. 11-12

Paper i proceeding

2011

Reconfigurable Instruction Decoding for a Wide-Control-Word Processor

Alen Bardizbanyan, Magnus Själander, Per Larsson-Edefors

Proceedings of Reconfigurable Architectures Workshop (RAW), IEEE International Parallel & Distributed Processing Symposium (IPDPS), p. 322-325

Paper i proceeding

2010

Generation and Exploration of Layouts for Area-Efficient Barrel Shifters

Alen Bardizbanyan, KASYAB PARMESH SUBRAMANIYAN, Per Larsson-Edefors

Proceedings of IEEE Computer Society Annual Symp. on VLSI (ISVLSI), p. 454-455

Paper i proceeding

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