A Probabilistic Analysis of Resilient Reconfigurable Designs

Paper i proceeding, 2014

Reconfigurable hardware can be employed to tolerate permanent faults. Hardware components comprising a System-on-Chip can be partitioned into a handful of substitutable units interconnected with reconfigurable wires to allow isolation and replacement of faulty parts. This paper offers a probabilistic analysis of reconfigurable designs estimating for different fault densities the average number of fault-free components that can be constructed as well as the probability to guarantee a particular availability of components. Considering the area overheads of reconfigurability, we evaluate the resilience of various reconfigurable designs with different granularities. Based on this analysis, we conduct a comprehensive design-space exploration to identify the granularity mixes that maximize the fault-tolerance of a system. Our findings reveal that mixing fine-grain logic with a coarse-grain sparing approach tolerates up to 3x more permanent faults than component redundancy and 2x more than any other purely coarse-grain solution. Component redundancy is preferable at low fault densities, while coarse-grain and mixedgrain reconfigurability maximize availability at medium and high fault densities, respectively.