Optimization of Channel Structures in InP HEMT Technology for Cryogenic Low-Noise and Low-Power Operation

Journal article, 2023

We report the impact from channel composition on the cryogenic low-noise performance at low dc power for a 100-nm gate-length InGaAs-InAlAs-InP high-electron mobility transistor (HEMT). Two indium (In) channel compositions, 65% and 80%, were studied by dc and RF characterization at 300 and 5 K. For the cryogenic low-noise optimization, it was important to increase the transconductance to gate–source capacitance ratio in the weak inversion region implying that a higher maximum cutoff frequency in the HEMT does not guarantee lower noise. The HEMT noise performance was obtained from noise measurements in a hybrid three-stage 4–8-GHz ( $\textit{C}$ -band) low-noise amplifier (LNA) down to 300- $\mu$ W dc power dissipation. While the HEMT LNA noise performance for both the channel compositions at 300 K was found to be comparable, the HEMT LNA at 5 K with 65% In channel showed a minimum noise temperature of 1.4 K, whereas the noise temperature in the HEMT LNA with 80% In channel HEMTs increased to 2.4 K. The difference in the noise became more pronounced at reduced dc power dissipation. The ultralow dc power of 300 $\mu$ W demonstrated for a cryogenic $\textit{C}$ -band LNA with an average noise temperature of 2.9 K and 24-dB gain is of interest for future qubit read-out electronics at 4 K.