Henrik Eriksson

Visar 13 publikationer

2009

Custom Layout Strategy for Rectangle-Shaped Log-Depth Multiplier Reduction Tree

Patrik Kimfors, Niklas Broman, Andreas Haraldsson et al
Proceedings of IEEE International Conference of Electronics, Circuits and Systems
Paper i proceeding
2006

Toward Architecture-Based Test-Vector Generation for Timing Verification of Fast Parallel Multipliers

Henrik Eriksson, Per Larsson-Edefors, Daniel Eckerbert
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Artikel i vetenskaplig tidskrift
2006

Multiplier Reduction Tree with Logarithmic Logic Depth and Regular Connectivity

Henrik Eriksson, Per Larsson-Edefors, Mary Sheeran et al
IEEE Intl Symposium on Circuits and Systems (ISCAS)
Paper i proceeding
2005

A Low-Leakage Twin-Precision Multiplier Using Reconfigurable Power Gating

Magnus Själander, Mindaugas Drazdziulis, Per Larsson-Edefors et al
IEEE International Symposium on Circuits and Systems, p. 1654-7
Paper i proceeding
2004

A Power Cut-Off Technique for Gate Leakage Suppression

Mindaugas Drazdziulis, Per Larsson-Edefors, Daniel Eckerbert et al
European Solid-State Circuits Conference (ESSCIRC), p. 171-174
Paper i proceeding
2004

An Efficient Twin-Precision Multiplier

Magnus Själander, Henrik Eriksson, Per Larsson-Edefors
International Conference on Computer Design (ICCD), p. 30-33
Paper i proceeding
2004

Glitch-Conscious Low-Power Design of Arithmetic Circuits

Henrik Eriksson, Per Larsson-Edefors
2004 IEEE International Symposium on Cirquits and Systems - Proceedings; Vancouver, BC; Canada; 23 May 2004 through 26 May 2004. Vol. 2, p. II281-II284
Paper i proceeding
2004

Dynamic Pass-Transistor Dot Operators for Efficient Parallel-Prefix Adders

Henrik Eriksson, Per Larsson-Edefors
International Symposium on Circuits and Systems (ISCAS), Vancouver, CANADA. MAY 23-26, 2004. Vol. 2, p. 461-464
Paper i proceeding
2003

Dual Threshold Voltage Circuits in the Presence of Resistive Interconnects

Per Larsson-Edefors, Daniel Eckerbert, Henrik Eriksson et al
Proceedings of IEEE Computer Society Annual Symposium on VLSI
Paper i proceeding
2003

Characterizing Ripple-Carry Circuits Using Logical Effort

Henrik Eriksson, Per Larsson-Edefors
Proceedings of the Swedish System-on-Chip Conference
Övrigt konferensbidrag
2003

Full-Custom vs. Standard-Cell Design Flow - An Adder Case Study

Henrik Eriksson, Henrik Eriksson, Per Larsson-Edefors et al
Proceedings of Asia South-Pacific Design Automation Conference (ASPDAC), Kitakyushu, 21-24 January 2003, p. 507-510
Paper i proceeding
2002

Full-Custom vs. Standard-Cell Based Design – An Adder Comparison

Henrik Eriksson, Henrik Eriksson, Per Larsson-Edefors
Proceedings of the 2002 Swedish System-on-Chip Conference Falkenberg, Sweden, March 18-19, 2002.
Övrigt konferensbidrag

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