Fabrication and characterization of field-plated buried-gate SiC MESFETs
Artikel i vetenskaplig tidskrift, 2006

Silicon carbide (SiC) MESFETs were fabricated using a standard SiC MESFET structure with the application of the "buried-channel" and field-plate (FP) techniques in the process. FPs combined with a buried-gate are shown to be favorable concerning output power density and power-added efficiency (PAE), due to higher breakdown voltage and decreased output conductance. A very high power density of 7.8 W/mm was measured on-wafer at 3 GHz for a two-finger 400-/spl mu/m gate periphery SiC MESFET. The PAE for this device was 70% at class AB bias. Two-tone measurements at 3 GHz /spl plusmn/ 100 kHz indicate an optimum FP length for high linearity operation.

wide band gap semiconductors

silicon compounds

microwave field effect transistors

Schottky gate field effect transistors

Författare

Kristoffer Andersson

Chalmers, Mikroteknologi och nanovetenskap, Mikrovågselektronik

Mattias Sudow

Chalmers, Mikroteknologi och nanovetenskap, Mikrovågselektronik

Per-Åke Nilsson

Chalmers, Mikroteknologi och nanovetenskap, Mikrovågselektronik

Einar Sveinbjörnsson

Chalmers, Mikroteknologi och nanovetenskap, Mikrovågselektronik

Hans Hjelmgren

Chalmers, Mikroteknologi och nanovetenskap, Mikrovågselektronik

Joakim Nilsson

Ericsson AB

Johan Ståhl

Ericsson AB

Herbert Zirath

Chalmers, Mikroteknologi och nanovetenskap, Mikrovågselektronik

Niklas Rorsman

Chalmers, Mikroteknologi och nanovetenskap, Mikrovågselektronik

IEEE Electron Device Letters

0741-3106 (ISSN) 15580563 (eISSN)

Vol. 27 7 573-575

Ämneskategorier

Annan elektroteknik och elektronik

DOI

10.1109/LED.2006.877285

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2020-02-07