Sally A McKee
Showing 55 publications
XOS: An Application-Defined Operating System for Datacenter Computing
RAGuard: A hardware based mechanism for backward-edge control-flow integrity
Main Memory in HPC: Do We Need More or Could We Live with Less?
Verifying reliability properties using the hyperball abstract domain
Understanding Data Analytics Workloads on Intel(R) Xeon Phi(R)
Twin-Load: Bridging the Gap between Conventional Direct-Attached and Buffer-on-Board Memory Systems
Venice: Exploring Server Architectures for Effective Resource Sharing
Exploiting Program Semantics to Place Data in Hybrid Memory
Self-Tuned Software-Managed Energy Reduction in Infiniband Links
Agave: a Benchmark Suite for Exploring the Complexities of the Android Software Stack
P-Socket: Optimizing a communication library for a PCIe-based intra-rack interconnect
Redesigning a tagless access buffer to require minimal ISA changes
A Methodology for Modeling Dynamic and Static Power Consumption
Co-DIMM: Inter-Socket Data Sharing via a Common DIMM Channel
Extending on-chip interconnects for rack-level remote resource access
Another Trip to the Wall: How Much Will Stacked DRAM Benefit HPC?
Adapting Memory Hierarchies for Emerging Datacenter Interconnects
QBLESS: A case for QoS-aware bufferless NoCs
Understanding the behavior of in-memory computing workloads
Performance and energy analysis of the restricted transactional memory implementation on haswell
DTail: A flexible approach to DRAM refresh management
Digging deeper into cluster system logs for failure prediction and root cause diagnosis
Characterizing and subsetting big data workloads
An automated performance-aware approach to reliability transformations
Improving Data Access Efficiency by Using a Tagless Access Buffer (TAB)
Embedded reconfigurable computing: The ERA approach
A Hybrid Main Memory Systems Taxonomy
An LTE Uplink Receiver PHY Benchmark and Subframe-Based Power Management
Design principles for synthesizable processor cores
ROSE::FTTransform - A source-to-source translation framework for exascale fault-tolerance research
Techniques to Measure, Model, and Manage Power
Parallelizing more loops with compiler guided refactoring
Performance optimization by dynamic code transformation
Declarative, SAT-solver-based Scheduling for an Embedded Architecture with a Flexible Datapath
Infrastructures for Measuring Power
A SAT-Based Compiler for FlexCore
Early results from ERA embedded reconfigurable architectures
Power-Aware Resource Scheduling in Base Stations
An approach to resource-aware co-scheduling for CMPs
Portable, scalable, per-core power estimation for intelligent resource management
Global Management of Cache Hierarchies
Comparing scalability prediction strategies on an SMP of CMPs
Designing OS for HPC applications: Scheduling
A multi-pronged approach to benchmark characterization
Code density concerns for new architectures
Cancellation of Loads that Return Zero Using Zero-Value Caches
Compiler-enhanced incremental checkpointing for openMP applications
Zero-Value Caches: Cancelling Loads that Return Zero
Accomodating diversity in CMPs with heterogeneous frequencies
Understanding parsec performance on contemporary CMPS
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Showing 2 research projects
ACE: Approximate Algorithms and Computing Systems
Green Computing Node for European micro-servers (EUROSERVER)